Simulation Approach for Timing Analysis of Genetic Logic Circuits
نویسندگان
چکیده
منابع مشابه
Variable Delay Timing Analysis of Logic Circuits
We propose a new simulation algorithm for combinational circuits which accurately models delay variations in the gates. The algorithm can also be used for the timing veriication of asynchronous circuits, eg hazard detection, race/oscillation of sequential circuits, etc. The basic idea is to assign a time variable to each signal transition (edge). The gate delays translate to algebraic relations...
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ژورنال
عنوان ژورنال: ACS Synthetic Biology
سال: 2017
ISSN: 2161-5063,2161-5063
DOI: 10.1021/acssynbio.6b00296